A bidirectional signal interface allows communication between two or more circuits that generate logic signals having different voltage levels. For example, a processor generates a logic-0 level equal to 0 Volts (V) (a low level) and a logic-1 level equal to 1.8 V (a high level), and a memory generates a logic-0 level equal to 0 V and a logic-1 level equal to 2.7 V. Because the processor and memory logic-1 levels are different, one typically cannot connect the signal (e.g., data address) nodes of the processor directly to the corresponding signal nodes of the memory. Instead, one places a bidirectional signal interface between the processor and memory, and the interface performs a step-up translation of the logic-1 level of the processor to the logic-1 level of the memory, and performs a step-down translation of the logic-1 level of the memory to the logic-1 level of the processor. However, for the existing signal interfaces, as the output edge detection circuit is not disabled, which may cause the high-strength driver at the input to turn on the drive input, a collision may occur with the external signal source at the input (e.g., if the external signal source at the input is changing the signals status thereof), causing large current consumption. Alternatively, the external signal source at the input cannot change the signal status thereof until the high-strength driver at the input is disabled (e.g., completes its outputting operation). The problem with this approach lies in slow transmission rate and high power consumption in a no-signal-translation state.